The present invention relates generally to the field of semiconductor manufacturing and, more specifically, to a method for high mobility field effect transistors.
The need to remain cost and performance competitive in the production of semiconductor devices has caused continually increasing device density in integrated circuits. To facilitate the increase in device density, new technologies are constantly needed to allow the feature size of these semiconductor devices to be reduced.
The push for ever increasing device densities is particularly strong in CMOS technologies, such as the in the design and fabrication of field effect transistors (FETs). FETs are used in almost all types of integrated circuit design (i.e., microprocessors, memory, etc.) As device densities are increased, concomitant increases in electric fields result in decreased electron and hole mobility, in conflict with the desire for increased switching speed of the FETs.
Thus, there is a need for improved device structures and methods of fabrications that provide for high performance devices without negative impacts to device density.
In a first aspect, the invention comprises a method of forming a semiconductor substrate, the method comprising the steps of providing a semiconductor wafer, the semiconductor wafer having an SOI layer and a buried insulator layer; patterning the semiconductor wafer to define at least a first SOI island and a second SOI island, the patterning forming a trench between first SOI island and the second SOI island; straining the first and second SOI islands; and forming a conductive bridge in the trench.
In a second aspect, the invention comprises an island of strained semiconductor material, the island having a top, sides and a bottom; a non-insulative material adjacent at least one of the sides of the island, the non-insulating material having a top; and a layer of conductive material overlaying a portion of the top of the island and a portion of the non-insulative material, and reacting therewith to form a conductive reaction product.
The present invention thus provides a device design and method for forming Field Effect Transistors (FETs) that have improved performance without negative impacts to device density. The present invention forms high-gain p-channel transistors by forming them on silicon islands where hole mobility has been increased. The hole mobility is increased by applying physical straining to the silicon islands. By straining the silicon islands, the hole mobility is increased resulting in increased device gain. This is accomplished without requiring an increase in the size of the devices, or the size of the contacts to the devices.